The world's leading source for technical x86 processor information.
regs
general purpose registers
rFLAGS
masks
|
bounds
|
CET
segment registers
table registers
control registers
debug registers
legacy FP
|
vector FP
model specific registers
code
opcode encoding
1 byte opcodes
2 byte opcodes
3 byte opcodes
map 4 opcodes
opcode groups
FP
|
3DNow!
|
SSE5A
|
XOP
mod R/M byte
and
SIB byte
16-bit mod R/M byte
data
binary
|
ternary
datatypes
stack frame
selectors
descriptors
descriptor tables
task state segment
paging structures
system management mode
misc
condition codes
exceptions
|
interrupts
legacy stuff
|
APIC
Intel VMX
|
AMD SVM
coherency
processor mode
initial state
canonical addresses
CPUID
restrict search to www.sandpile.org
© 1996-2024 by Christian Ludloff. All rights reserved. Use at your own risk.