x86 architecture
bits




 
bit manipulation
 
CPUID official
mnemonic
operation description example better mnemonic
from description
better mnemonic
from operation
TBM BLCS X | (X+1) turn on rightmost 0-bit 10101011 => 10101111 BM SET RM0 ADD1OR
BMI BLSR X & (X-1) turn off rightmost 1-bit -- test if X is 2^n 10101000 => 10100000 BM CLR RM1 SUB1AND
TBM BLCFILL X & (X+1) right-propagate rightmost 0-bit -- test if X is 2^n-1 10100111 => 10100000 BM RPR RM0 ADD1AND
TBM BLSFILL X | (X-1) right-propagate rightmost 1-bit 10101000 => 10101111 BM RPR RM1 SUB1OR
TBM BLCMSK X ^ (X+1) form mask of rightmost 0 and trailing 1s 10101011 => 00000111 BM FM RM0 T1S ADD1XOR
BMI BLSMSK X ^ (X-1) form mask of rightmost 1 and trailing 0s 10101000 => 00001111 BM FM RM1 T0S SUB1XOR
BMI BLSI X & -X form mask of rightmost 1-bit 10100100 => 00000100 BM FM RM1 NEGAND
TBM BLCIC ~X & (X+1) form mask of rightmost 0-bit 10101011 => 00000100 BM FM RM0 ADD1ANDN
TBM TZMSK ~X & (X-1) form mask of trailing 0s 10101000 => 00000111 BM FM T0S SUB1ANDN
TBM BLCI X | ~(X+1) form complemented mask of rightmost 0-bit 10101011 => 11111011 BM FCM RM0 ADD1NOTOR
TBM BLSIC ~X | (X-1) form complemented mask of rightmost 1-bit 10101100 => 11111011 BM FCM RM1 SUB1ORN
TBM T1MSKC ~X | (X+1) form complemented mask of trailing 1s 10101011 => 11111100 BM FCM T1S ADD1ORN

 
binary logical operations
 
1 1 0 0 input X Accu Mem Both
Compl Zero One
1 0 1 0 input Y
bits operation instruction PDP-10
0 0 0 0 0 0 SETZ
1 0 0 0 X & Y AND AND
0 1 0 0 X & ~Y ANDNBMI ANDCA
1 1 0 0 X X SETM
0 0 1 0 ~X & Y ANDNBMI ANDCM
1 0 1 0 Y Y SETA
0 1 1 0 X ^ Y XOR XOR
1 1 1 0 X | Y OR IOR
0 0 0 1 ~(X | Y) NORn/a ANDCB
1 0 0 1 ~(X ^ Y) NXORn/a EQV
0 1 0 1 ~Y NOT SETCA
1 1 0 1 X | ~Y ORN=NANDNn/a ORCA
0 0 1 1 ~X NOT SETCM
1 0 1 1 ~X | Y ORN=NANDNn/a ORCM
0 1 1 1 ~(X & Y) NANDn/a ORCB
1 1 1 1 1 1 SETO



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