x86 architecture
bounds registers




 
BND0...3
 
name 1
2
7
  6
4
6
3
  0
BND0  
upper bound
 
 
lower bound
 
BND1  
upper bound
 
 
lower bound
 
BND2  
upper bound
 
 
lower bound
 
BND3  
upper bound
 
 
lower bound
 

 
config and status registers
 
name 6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
 
BNDCFGS
 
 
BD base
 
 
BD base
 
reserved B
p
r
v
En
 
BNDCFGU
 
 
BD base
 
 
BD base
 
ignored B
p
r
v
En
 
BNDSTATUS
 
 
BDE address
 
 
BDE address
 
EC



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