x86 architecture
vector floating-point registers




 
traditional SSE vector floating-point registers
 
5
1
1
  2
5
6
2
5
5
  1
2
8
1
2
7
   
0
 
preserved (legacy) or zero-extended (VEX) XMM0
preserved (legacy) or zero-extended (VEX) YMM0
ZMM0
preserved (legacy) or zero-extended (VEX) XMM1
preserved (legacy) or zero-extended (VEX) YMM1
ZMM1
preserved (legacy) or zero-extended (VEX) XMM2
preserved (legacy) or zero-extended (VEX) YMM2
ZMM2
preserved (legacy) or zero-extended (VEX) XMM3
preserved (legacy) or zero-extended (VEX) YMM3
ZMM3
preserved (legacy) or zero-extended (VEX) XMM4
preserved (legacy) or zero-extended (VEX) YMM4
ZMM4
preserved (legacy) or zero-extended (VEX) XMM5
preserved (legacy) or zero-extended (VEX) YMM5
ZMM5
preserved (legacy) or zero-extended (VEX) XMM6
preserved (legacy) or zero-extended (VEX) YMM6
ZMM6
preserved (legacy) or zero-extended (VEX) XMM7
preserved (legacy) or zero-extended (VEX) YMM7
ZMM7

 
additional VEX vector floating-point registers
 
5
1
1
  2
5
6
2
5
5
  1
2
8
1
2
7
   
0
 
preserved (legacy) or zero-extended (VEX) XMM8
preserved (legacy) or zero-extended (VEX) YMM8
ZMM8
preserved (legacy) or zero-extended (VEX) XMM9
preserved (legacy) or zero-extended (VEX) YMM9
ZMM9
preserved (legacy) or zero-extended (VEX) XMM10
preserved (legacy) or zero-extended (VEX) YMM10
ZMM10
preserved (legacy) or zero-extended (VEX) XMM11
preserved (legacy) or zero-extended (VEX) YMM11
ZMM11
preserved (legacy) or zero-extended (VEX) XMM12
preserved (legacy) or zero-extended (VEX) YMM12
ZMM12
preserved (legacy) or zero-extended (VEX) XMM13
preserved (legacy) or zero-extended (VEX) YMM13
ZMM13
preserved (legacy) or zero-extended (VEX) XMM14
preserved (legacy) or zero-extended (VEX) YMM14
ZMM14
preserved (legacy) or zero-extended (VEX) XMM15
preserved (legacy) or zero-extended (VEX) YMM15
ZMM15

 
additional MVEX vector floating-point registers
 
5
1
1
  2
5
6
2
5
5
  1
2
8
1
2
7
   
0
 
ZMM16
ZMM17
ZMM18
ZMM19
ZMM20
ZMM21
ZMM22
ZMM23
ZMM24
ZMM25
ZMM26
ZMM27
ZMM28
ZMM29
ZMM30
ZMM31

 
additional EVEX vector floating-point registers
 
5
1
1
  2
5
6
2
5
5
  1
2
8
1
2
7
   
0
 
preserved (legacy) or zero-extended (VEX) XMM16
preserved (legacy) or zero-extended (VEX) YMM16
ZMM16
preserved (legacy) or zero-extended (VEX) XMM17
preserved (legacy) or zero-extended (VEX) YMM17
ZMM17
preserved (legacy) or zero-extended (VEX) XMM18
preserved (legacy) or zero-extended (VEX) YMM18
ZMM18
preserved (legacy) or zero-extended (VEX) XMM19
preserved (legacy) or zero-extended (VEX) YMM19
ZMM19
preserved (legacy) or zero-extended (VEX) XMM20
preserved (legacy) or zero-extended (VEX) YMM20
ZMM20
preserved (legacy) or zero-extended (VEX) XMM21
preserved (legacy) or zero-extended (VEX) YMM21
ZMM21
preserved (legacy) or zero-extended (VEX) XMM22
preserved (legacy) or zero-extended (VEX) YMM22
ZMM22
preserved (legacy) or zero-extended (VEX) XMM23
preserved (legacy) or zero-extended (VEX) YMM23
ZMM23
preserved (legacy) or zero-extended (VEX) XMM24
preserved (legacy) or zero-extended (VEX) YMM24
ZMM24
preserved (legacy) or zero-extended (VEX) XMM25
preserved (legacy) or zero-extended (VEX) YMM25
ZMM25
preserved (legacy) or zero-extended (VEX) XMM26
preserved (legacy) or zero-extended (VEX) YMM26
ZMM26
preserved (legacy) or zero-extended (VEX) XMM27
preserved (legacy) or zero-extended (VEX) YMM27
ZMM27
preserved (legacy) or zero-extended (VEX) XMM28
preserved (legacy) or zero-extended (VEX) YMM28
ZMM28
preserved (legacy) or zero-extended (VEX) XMM29
preserved (legacy) or zero-extended (VEX) YMM29
ZMM29
preserved (legacy) or zero-extended (VEX) XMM30
preserved (legacy) or zero-extended (VEX) YMM30
ZMM30
preserved (legacy) or zero-extended (VEX) XMM31
preserved (legacy) or zero-extended (VEX) YMM31
ZMM31

 
control/status register
 
register 3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1  
0
 
MXCSR reserved D
U
E
?
?
?
res. M
M
r. F
Z
RC P
M
U
M
O
M
Z
M
D
M
I
M
D
A
Z
P
E
U
E
O
E
Z
E
D
E
I
E

note: DAZ was introduced with SSE2. Check MXCSR_MASK (below) for more details.
note: MM was introduced with MSSE. Check MXCSR_MASK (below) for more details.
note: ??? was introduced with K1OM. Check MXCSR_MASK (below) for more details.
note: DUE was introduced with MVEX. Check MXCSR_MASK (below) for more details.



 
FXSAVE and FXRSTOR format
 
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 offset
reserved FP_CS FP_IP FP_OPC res. FEMPTY SW CW +0000h
FP_IP64 (if 64-bit operand size)
MXCSR_MASK #1,#2 MXCSR #1 reserved FP_DS FP_DP +0010h
FP_DP64 (if 64-bit operand size)
reserved ST(0) or MM0 +0020h
reserved ST(1) or MM1 +0030h
reserved ST(2) or MM2 +0040h
reserved ST(3) or MM3 +0050h
reserved ST(4) or MM4 +0060h
reserved ST(5) or MM5 +0070h
reserved ST(6) or MM6 +0080h
reserved ST(7) or MM7 +0090h
XMM0 #1 +00A0h
XMM1 #1 +00B0h
XMM2 #1 +00C0h
XMM3 #1 +00D0h
XMM4 #1 +00E0h
XMM5 #1 +00F0h
XMM6 #1 +0100h
XMM7 #1 +0110h
XMM8 #1 +0120h
XMM9 #1 +0130h
XMM10 #1 +0140h
XMM11 #1 +0150h
XMM12 #1 +0160h
XMM13 #1 +0170h
XMM14 #1 +0180h
XMM15 #1 +0190h
reserved +01A0h
reserved +01B0h
reserved +01C0h
reserved +01D0h
reserved +01E0h
reserved +01F0h
note description
#1 Whether or not these fields are saved/restored while CR4.OSFXSR=0 is implementation-specific. The XMMn fields won't be saved/restored in CPL=0 PM64, if EFER.FFXSR is set to 1.
#2 If this field is not written to by FXSAVE, then any MXCSR value that is to be loaded by FXRSTOR or LDMXCSR must be AND-masked with 0000_FFBFh first. Otherwise the value written by FXSAVE is to be used to AND-mask the MXCSR value before loading it with FXRSTOR or LDMXCSR.



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