x86 architecture
3 byte opcodes




note: AMD abandoned DREX in favor of SSE4.1, AVX (for COMcc[PS|PD|SS|SD]),
AVX2 (for PERM[PS|PD]), FMA4, F16C, and XOP -- so DREX never shipped



pre-
fix
&
OC0
0Fh
24h
xxh
 
x0h
 
x1h x2h x3h x4h x5h x6h x7h
n/a
 
OC0
=0
0xh FMADDPS
VDo,VDo,Vo,Wo
(SSE5A)
FMADDPD
VDo,VDo,Vo,Wo
(SSE5A)
FMADDSS
VDd,VDd,Vd,Wd
(SSE5A)
FMADDSD
VDq,VDq,Vq,Wq
(SSE5A)
FMADDPS
VDo,Vo,Wo,VDo
(SSE5A)
FMADDPD
VDo,Vo,Wo,VDo
(SSE5A)
FMADDSS
VDd,Vd,Wd,VDd
(SSE5A)
FMADDSD
VDq,Vq,Wq,VDq
(SSE5A)
n/a
 
OC0
=1
FMADDPS
VDo,VDo,Wo,Vo
(SSE5A)
FMADDPD
VDo,VDo,Wo,Vo
(SSE5A)
FMADDSS
VDd,VDd,Wd,Vd
(SSE5A)
FMADDSD
VDq,VDq,Wq,Vq
(SSE5A)
FMADDPS
VDo,Wo,Vo,VDo
(SSE5A)
FMADDPD
VDo,Wo,Vo,VDo
(SSE5A)
FMADDSS
VDd,Wd,Vd,VDd
(SSE5A)
FMADDSD
VDq,Wq,Vq,VDq
(SSE5A)
n/a
 
OC0
=0
1xh FNMADDPS
VDo,VDo,Vo,Wo
(SSE5A)
FNMADDPD
VDo,VDo,Vo,Wo
(SSE5A)
FNMADDSS
VDd,VDd,Vd,Wd
(SSE5A)
FNMADDSD
VDq,VDq,Vq,Wq
(SSE5A)
FNMADDPS
VDo,Vo,Wo,VDo
(SSE5A)
FNMADDPD
VDo,Vo,Wo,VDo
(SSE5A)
FNMADDSS
VDd,Vd,Wd,VDd
(SSE5A)
FNMADDSD
VDq,Vq,Wq,VDq
(SSE5A)
n/a
 
OC0
=1
FNMADDPS
VDo,VDo,Wo,Vo
(SSE5A)
FNMADDPD
VDo,VDo,Wo,Vo
(SSE5A)
FNMADDSS
VDd,VDd,Wd,Vd
(SSE5A)
FNMADDSD
VDq,VDq,Wq,Vq
(SSE5A)
FNMADDPS
VDo,Wo,Vo,VDo
(SSE5A)
FNMADDPD
VDo,Wo,Vo,VDo
(SSE5A)
FNMADDSS
VDd,Wd,Vd,VDd
(SSE5A)
FNMADDSD
VDq,Wq,Vq,VDq
(SSE5A)
n/a
 
OC0
=0
2xh PERMPS
VDo,VDo,Vo,Wo
(SSE5A)
PERMPD
VDo,VDo,Vo,Wo
(SSE5A)
PCMOV
VDo,VDo,Vo,Wo
(SSE5A)
PPERM
VDo,VDo,Vo,Wo
(SSE5A)
PERMPS
VDo,Vo,Wo,VDo
(SSE5A)
PERMPD
VDo,Vo,Wo,VDo
(SSE5A)
PCMOV
VDo,Vo,Wo,VDo
(SSE5A)
PPERM
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=1
PERMPS
VDo,VDo,Wo,Vo
(SSE5A)
PERMPD
VDo,VDo,Wo,Vo
(SSE5A)
PCMOV
VDo,VDo,Wo,Vo
(SSE5A)
PPERM
VDo,VDo,Wo,Vo
(SSE5A)
PERMPS
VDo,Wo,Vo,VDo
(SSE5A)
PERMPS
VDo,Wo,Vo,VDo
(SSE5A)
PCMOV
VDo,Wo,Vo,VDo
(SSE5A)
PPERM
VDo,Wo,Vo,VDo
(SSE5A)
n/a
 
OC0
=0
3xh
n/a
 
OC0
=1
n/a
 
OC0
=0
4xh PROTB
VDo,Vo,Wo
(SSE5A)
PROTW
VDo,Vo,Wo
(SSE5A)
PROTD
VDo,Vo,Wo
(SSE5A)
PROTQ
VDo,Vo,Wo
(SSE5A)
PSHLB
VDo,Vo,Wo
(SSE5A)
PSHLW
VDo,Vo,Wo
(SSE5A)
PSHLD
VDo,Vo,Wo
(SSE5A)
PSHLQ
VDo,Vo,Wo
(SSE5A)
n/a
 
OC0
=1
PROTB
VDo,Wo,Vo
(SSE5A)
PROTW
VDo,Wo,Vo
(SSE5A)
PROTD
VDo,Wo,Vo
(SSE5A)
PROTQ
VDo,Wo,Vo
(SSE5A)
PSHLB
VDo,Wo,Vo
(SSE5A)
PSHLW
VDo,Wo,Vo
(SSE5A)
PSHLD
VDo,Wo,Vo
(SSE5A)
PSHLQ
VDo,Wo,Vo
(SSE5A)
n/a
 
OC0
=0
8xh PMACSSWW
VDo,Vo,Wo,VDo
(SSE5A)
PMACSSWD
VDo,Vo,Wo,VDo
(SSE5A)
PMACSSDQL
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=0
9xh PMACSWW
VDo,Vo,Wo,VDo
(SSE5A)
PMACSWD
VDo,Vo,Wo,VDo
(SSE5A)
PMACSDQL
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=0
Axh PMADCSSWD
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=0
Bxh PMADCSWD
VDo,Vo,Wo,VDo
(SSE5A)

pre-
fix
&
OC0
0Fh
24h
xxh
 
x8h
 
x9h xAh xBh xCh xDh xEh xFh
n/a
 
OC0
=0
0xh FMSUBPS
VDo,VDo,Vo,Wo
(SSE5A)
FMSUBPD
VDo,VDo,Vo,Wo
(SSE5A)
FMSUBSS
VDd,VDd,Vd,Wd
(SSE5A)
FMSUBSD
VDq,VDq,Vq,Wq
(SSE5A)
FMSUBPS
VDo,Vo,Wo,VDo
(SSE5A)
FMSUBPD
VDo,Vo,Wo,VDo
(SSE5A)
FMSUBSS
VDd,Vd,Wd,VDd
(SSE5A)
FMSUBSD
VDq,Vq,Wq,VDq
(SSE5A)
n/a
 
OC0
=1
FMSUBPS
VDo,VDo,Wo,Vo
(SSE5A)
FMSUBPD
VDo,VDo,Wo,Vo
(SSE5A)
FMSUBSS
VDd,VDd,Wd,Vd
(SSE5A)
FMSUBSD
VDq,VDq,Wq,Vq
(SSE5A)
FMSUBPS
VDo,Wo,Vo,VDo
(SSE5A)
FMSUBPD
VDo,Wo,Vo,VDo
(SSE5A)
FMSUBSS
VDd,Wd,Vd,VDd
(SSE5A)
FMSUBSD
VDq,Wq,Vq,VDq
(SSE5A)
n/a
 
OC0
=0
1xh FNMSUBPS
VDo,VDo,Vo,Wo
(SSE5A)
FNMSUBPD
VDo,VDo,Vo,Wo
(SSE5A)
FNMSUBSS
VDd,VDd,Vd,Wd
(SSE5A)
FNMSUBSD
VDq,VDq,Vq,Wq
(SSE5A)
FNMSUBPS
VDo,Vo,Wo,VDo
(SSE5A)
FNMSUBPD
VDo,Vo,Wo,VDo
(SSE5A)
FNMSUBSS
VDd,Vd,Wd,VDd
(SSE5A)
FNMSUBSD
VDq,Vq,Wq,VDq
(SSE5A)
n/a
 
OC0
=1
FNMSUBPS
VDo,VDo,Wo,Vo
(SSE5A)
FNMSUBPD
VDo,VDo,Wo,Vo
(SSE5A)
FNMSUBSS
VDd,VDd,Wd,Vd
(SSE5A)
FNMSUBSD
VDq,VDq,Wq,Vq
(SSE5A)
FNMSUBPS
VDo,Wo,Vo,VDo
(SSE5A)
FNMSUBPD
VDo,Wo,Vo,VDo
(SSE5A)
FNMSUBSS
VDd,Wd,Vd,VDd
(SSE5A)
FNMSUBSD
VDq,Wq,Vq,VDq
(SSE5A)
n/a
 
OC0
=0
2xh
n/a
 
OC0
=1
n/a
 
OC0
=0
3xh
n/a
 
OC0
=1
n/a
 
OC0
=0
4xh PSHAB
VDo,Vo,Wo
(SSE5A)
PSHAW
VDo,Vo,Wo
(SSE5A)
PSHAD
VDo,Vo,Wo
(SSE5A)
PSHAQ
VDo,Vo,Wo
(SSE5A)
n/a
 
OC0
=1
PSHAB
VDo,Wo,Vo
(SSE5A)
PSHAW
VDo,Wo,Vo
(SSE5A)
PSHAD
VDo,Wo,Vo
(SSE5A)
PSHAQ
VDo,Wo,Vo
(SSE5A)
n/a
 
OC0
=0
8xh PMACSSDD
VDo,Vo,Wo,VDo
(SSE5A)
PMACSSDQH
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=0
9xh PMACSDD
VDo,Vo,Wo,VDo
(SSE5A)
PMACSDQH
VDo,Vo,Wo,VDo
(SSE5A)
n/a
 
OC0
=0
Axh
n/a
 
OC0
=0
Bxh



pre-
fix
&
OC0
0Fh
25h
xxh
 
x8h
 
x9h xAh xBh xCh xDh xEh xFh
n/a
 
OC0
=0
2xh COMccPS #1
VDo,Vo,Wo,Ib
(SSE5A)
COMccPD #1
VDo,Vo,Wo,Ib
(SSE5A)
COMccSS #1
VDd,Vd,Wd,Ib
(SSE5A)
COMccSD #1
VDq,Vq,Wq,Ib
(SSE5A)
n/a
 
OC0
=0
4xh PCOMccB #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccW #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccD #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccQ #2
VDo,Vo,Wo,Ib
(SSE5A)
n/a
 
OC0
=0
6xh PCOMccUB #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccUW #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccUD #2
VDo,Vo,Wo,Ib
(SSE5A)
PCOMccUQ #2
VDo,Vo,Wo,Ib
(SSE5A)
notes descriptions
#1 The condition codes are   EQ,   LT,   LE, and UNORD. They are encoded as the Ib, using 00...03h.
The condition codes are UNEQ, UNLT, UNLE, and   ORD. They are encoded as the Ib, using 04...07h.
The condition codes are  UEQ,  ULT,  ULE, and FALSE. They are encoded as the Ib, using 08...0Bh.
The condition codes are  NEQ,  NLT,  NLE, and  TRUE. They are encoded as the Ib, using 0C...0Fh.
#2 The condition codes are LT, LE, GT, GE, EQ, NEQ, FALSE, and TRUE. They are encoded as the Ib, using 00...07h.



pre-
fix
0Fh
7Ah
xxh
 
x0h
 
x1h x2h x3h x4h x5h x6h x7h
 
n/a
 
1xh FRCZPS
Vo,Wo
(SSE5A)
FRCZPD
Vo,Wo
(SSE5A)
FRCZSS
Vd,Wd
(SSE5A)
FRCZSD
Vq,Wq
(SSE5A)
 
n/a
 
3xh CVTPH2PS
Vo,Wq
(SSE5A)
CVTPS2PH
Wq,Vo
(SSE5A)
 
n/a
 
4xh PHADDBW
Vo,Wo
(SSE5A)
PHADDBD
Vo,Wo
(SSE5A)
PHADDBQ
Vo,Wo
(SSE5A)
PHADDWD
Vo,Wo
(SSE5A)
PHADDWQ
Vo,Wo
(SSE5A)
 
n/a
 
5xh PHADDUBW
Vo,Wo
(SSE5A)
PHADDUBD
Vo,Wo
(SSE5A)
PHADDUBQ
Vo,Wo
(SSE5A)
PHADDUWD
Vo,Wo
(SSE5A)
PHADDUWQ
Vo,Wo
(SSE5A)
 
n/a
 
6xh PHSUBBW
Vo,Wo
(SSE5A)
PHSUBWD
Vo,Wo
(SSE5A)
PHSUBDQ
Vo,Wo
(SSE5A)

pre-
fix
0Fh
7Ah
xxh
 
x8h
 
x9h xAh xBh xCh xDh xEh xFh
 
n/a
 
4xh PHADDDQ
Vo,Wo
(SSE5A)
 
n/a
 
5xh PHADDUDQ
Vo,Wo
(SSE5A)



pre-
fix
0Fh
7Bh
xxh
 
x0h
 
x1h x2h x3h x4h x5h x6h x7h
 
n/a
 
4xh PROTB
Vo,Wo,Ib
(SSE5A)
PROTW
Vo,Wo,Ib
(SSE5A)
PROTD
Vo,Wo,Ib
(SSE5A)
PROTQ
Vo,Wo,Ib
(SSE5A)



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© 1996-2024 by Christian Ludloff. All rights reserved. Use at your own risk.