x86 architecture
debug registers


 
DR0...15
 
name 6
3		 6
2		 6
1		 6
0		 5
9		 5
8		 5
7		 5
6		 5
5		 5
4		 5
3		 5
2		 5
1		 5
0		 4
9		 4
8		 4
7		 4
6		 4
5		 4
4		 4
3		 4
2		 4
1		 4
0		 3
9		 3
8		 3
7		 3
6		 3
5		 3
4		 3
3		 3
2
3
1		 3
0		 2
9		 2
8		 2
7		 2
6		 2
5		 2
4		 2
3		 2
2		 2
1		 2
0		 1
9		 1
8		 1
7		 1
6		 1
5		 1
4		 1
3		 1
2		 1
1		 1
0		 9 8 7 6 5 4 3 2 1 0
DR0  
breakpoint #0 virtual address
 
 
breakpoint #0 virtual address
 
DR1  
breakpoint #1 virtual address
 
 
breakpoint #1 virtual address
 
DR2  
breakpoint #2 virtual address
 
 
breakpoint #2 virtual address
 
DR3  
breakpoint #3 virtual address
 
 
breakpoint #3 virtual address
 
DR4  
reserved
 
 
reserved
 
DR5  
reserved
 
 
reserved
 
DR6  
reserved
 
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 R
T
M		 B
T		 B
S		 B
D		 S
M
M		 1 1 1 1 1 1 1 1 B
3		 B
2		 B
1		 B
0
DR7  
reserved
 
LEN
3		 R/W
3		 LEN
2		 R/W
2		 LEN
1		 R/W
1		 LEN
0		 R/W
0		 T
T		 T
B		 G
D		 I
C
E		 R
T
M		 1 G
E		 L
E		 G
3		 L
3		 G
2		 L
2		 G
1		 L
1		 G
0		 L
0
DR8  
reserved
 
 
reserved
 
DR9  
reserved
 
 
reserved
 
DR10  
reserved
 
 
reserved
 
DR11  
reserved
 
 
reserved
 
DR12  
reserved
 
 
reserved
 
DR13  
reserved
 
 
reserved
 
DR14  
reserved
 
 
reserved
 
DR15  
reserved
 
 
reserved
 

note: In LM a LENn value of 10b is no longer reserved. Instead it selects an 8 byte breakpoint.

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